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ISL84581
Data Sheet February 9, 2007 FN6416.0
Low-Voltage, Single and Dual Supply, 8 to 1 Multiplexer
The Intersil ISL84581 device contains precision, bidirectional, analog switches configured as an 8 to 1 multiplexer/ demultiplexer. It was designed to operate from a single +2V to +12V single supply or from dual 2V to 6V supplies. The device has an inhibit pin to simultaneously open all signal paths. ON resistance of 39 with a dual 5V supply and 125 with a single +3.3V supply. Each switch can handle rail to rail analog signals. The off-leakage current is only 0.1nA at +25C or 2.5nA at +85C. All digital inputs have 0.8V to 2.4V logic thresholds, ensuring TTL/CMOS logic compatibility when using a single 3.3V or +5V supply or dual 5V supplies. The ISL84581 is a single 8 to 1 multiplexer device. Table 1 summarizes the performance of the part.
TABLE 1. FEATURES AT A GLANCE CONFIGURATION 5V RON 5V tON/tOFF 12V RON 12V tON/tOFF 5V RON 5V tON/tOFF 3.3V RON 3.3V tON/tOFF Package SINGLE 8:1 MUX 39 32ns/18ns 32 23ns/15ns 65 38ns/19ns 125 70ns/32ns 16 Ld TSSOP
Features
* Fully Specified at 3.3V, 5V, 5V, and 12V Supplies for 10% Tolerances * ON Resistance (RON) Max, VS = 4.5V . . . . . . . . . . . 50 * ON Resistance (RON) Max, VS = +3V . . . . . . . . . . . 155 * RON Matching Between Channels, VS = 5V. . . . . . . . . <2 * Low Charge Injection, VS = 5V . . . . . . . . . . . . . 1pC (Max) * Single Supply Operation. . . . . . . . . . . . . . . . . . . +2V to +12V * Dual Supply Operation . . . . . . . . . . . . . . . . . . . . . 2V to 6V * Fast Switching Action (VS = +5V) - tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38ns - tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19ns * Guaranteed Max Off-leakage . . . . . . . . . . . . . . . . . . . 2.5nA * Guaranteed Break-Before-Make * TTL, CMOS Compatible * Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
* Battery Powered, Handheld, and Portable Equipment * Communications Systems - Radios - Telecom Infrastructure - ADSL, VDSL Modems * Test Equipment - Medical Ultrasound - Magnetic Resonance Image - CT and PET Scanners (MRI) - ATE - Electrocardiograph * Audio and Video Signal Routing * Various Circuits - +3V/+5V DACs and ADCs - Sample and Hold Circuits - Operational Amplifier Gain Switching Networks - High Frequency Analog Switching - High Speed Multiplexing - Integrator Reset Circuits
Related Literature
* Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)" * Application Note AN557 "Recommended Test Procedures for Analog Switches" * Application Note AN520 "CMOS Analog Multiplexers and Switches; Specifications and Application Considerations." * Application Note AN1034 "Analog Switch and Multiplexer Applications"
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL84581 Pinouts
ISL84581 (16 LD TSSOP) TOP VIEW
NO1 1 NO3 2 COM 3 NO7 4 NO5 5 INH 6 V- 7 GND 8 LOGIC 16 V+ 15 NO2 14 NO4 13 NO0 12 NO6 11 ADDC 10 ADDB 9 ADDA
NOTE: 1. Switches Shown for Logic "0" Inputs.
Truth Tables
ISL84581 INH 0 0 0 0 0 0 0 0 1 ADDC 0 0 0 0 1 1 1 1 X ADDB 0 0 1 1 0 0 1 1 X ADDA 0 1 0 1 0 1 0 1 X SWITCH ON NO0 NO1 NO2 NO3 NO4 NO5 NO6 NO7 NONE
Pin Descriptions
PIN V+ VGND INH ADDx COM NOx FUNCTION Positive Power Supply Input Negative Power Supply Input. Connect to GND for Single Supply Configurations. Ground Connection Digital Control Input. Connect to GND for Normal Operation. Connect to V+ to turn all switches off. Address Input Pin Analog Switch Common Pin Analog Switch Normally Open Pin
NOTE: Logic "0" 0.8V. Logic "1" 2.4V, with V+ between 2.7V and 10V. X = Don't Care.
Ordering Information
PART NO. ISL84581IVZ (See Note) ISL84581IVZ-T (See Note) BRAND 84581IVZ 84581IVZ TEMP RANGE (C) -40 to +85 -40 to +85 PACKAGE 16 Ld TSSOP (Pb-free) 16 Ld TSSOP, Tape and Reel (Pb-free) PKG. DWG. # M16.173 M16.173
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
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FN6416.0 February 9, 2007
ISL84581
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V V- to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15 to 0.3V Input Voltages INH, NOx, ADDx (Note 2). . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) Output Voltages COM (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . 30mA Peak Current NOx, COM (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . 100mA ESD Rating HBM (Per Mil-STD-883, Method 3015.7) . . . . . . . . . . . . . . >2.5kV
Thermal Information
Thermal Resistance (Typical, Note 3) JA (C/W) 16 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . . 110 Maximum Junction Temperature (Plastic Package). . . . . . . +150C Maximum Storage Temperature Range . . . . . . . . . . . -65C to +150C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . +300C (Lead Tips Only)
Operating Conditions
Temperature Range ISL84581IVZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 2. Signals on NOx, COM, ADDx, INH exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum current ratings. 3. JA is measured with the component mounted on a high effective thermal conductivity test board with direct die attach. See Tech Brief TB379 for details.
Electrical Specifications 5V Supply
Test Conditions: VSUPPLY = 4.5V to 5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified TEST CONDITIONS TEMP (C) (NOTE 5) MIN TYP (NOTE 5) MAX UNITS
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON
Full VS = 4.5V, ICOM = 2mA, VNO = 3V (See Figure 5) 25 Full 25 Full
V-0.1 -2.5 -0.1 -2.5 -0.1 -2.5
44 1.3 7.5 0.002 0.002 0.002 -
V+ 60 80 4 6 9 12 0.1 2.5 0.1 2.5 0.1 2.5
V nA nA nA nA nA nA
RON Matching Between Channels, RON VS = 4.5V, ICOM = 2mA, VNO = 3V (Note 6)
RON Flatness, RFLAT(ON)
VS = 4.5V, ICOM = 2mA, VNO = 3V, 0V (Note 7)
25 Full
NO OFF Leakage Current, INO(OFF)
VS = 5.5V, VCOM = 4.5V, VNO = +4.5V (Note 8)
25 Full
COM OFF Leakage Current, ICOM(OFF)
VS = 5.5V, VCOM = 4.5V, VNO = +4.5V (Note 8)
25 Full
COM ON Leakage Current, ICOM(ON)
VS = 5.5V, VCOM = VNO = 4.5V (Note 8)
25 Full
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINHH, VADDH Input Voltage Low, VINHL, VADDL Input Current, IADDH, IADDL, IINHH, IINHL VS = 5.5V, VINH, VADD = 0V or V+ DYNAMIC CHARACTERISTICS INHIBIT Turn-ON Time, tON VS = 4.5V, VNO = 3V, RL = 300, CL = 35pF, VIN = 0 to 3 (See Figure 1) 25 Full 35 50 60 ns ns Full Full Full 2.4 -0.5 0.8 0.5 V V A
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FN6416.0 February 9, 2007
ISL84581
Electrical Specifications 5V Supply
Test Conditions: VSUPPLY = 4.5V to 5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified (Continued) TEST CONDITIONS VS = 4.5V, VNO = 3V, RL = 300, CL = 35pF, VIN = 0 to 3 (See Figure 1) VS = 4.5V, VNO = 3V, RL = 300, CL = 35pF, VIN = 0 to 3 (See Figure 1) VS = 5.5V, VNO = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V (See Figure 3) CL = 1.0nF, VG = 0V, RG = 0 (See Figure 2) f = 1MHz, VNO = VCOM = 0V (See Figure 6) f = 1MHz, VNO = VCOM = 0V (See Figure 6) f = 1MHz, VNO = VCOM = 0V (See Figure 6) RL = 50, CL = 15pF, f = 100kHz, VNOx = 1VRMS (See Figures 4 and 18) TEMP (C) 25 Full 25 Full Full 25 25 25 25 25 (NOTE 5) MIN 2 TYP 22 43 7 0.3 3 21 26 92 (NOTE 5) MAX UNITS 35 40 60 70 1 ns ns ns ns ns pC pF pF pF dB
PARAMETER INHIBIT Turn-OFF Time, tOFF
Address Transition Time, tTRANS
Break-Before-Make Time, tBBM Charge Injection, Q NO OFF Capacitance, COFF COM OFF Capacitance, COFF COM ON Capacitance, CCOM(ON) OFF Isolation POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ Negative Supply Current, I-
Full VS = 5.5V, VINH, VADD = 0V or V+, Switch On or Off Full Full
2 -7 -1
-
6 7 1
V A A
Electrical Specifications +12V Supply
Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 4), Unless Otherwise Specified TEST CONDITIONS TEMP (C) (NOTE 5) MIN TYP (NOTE 5) MAX UNITS
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON
Full V+ = 10.8V, ICOM = 1.0mA, VNO = 9V (See Figure 5) 25 Full
0 -0.1 -2.5 -0.1 -2.5 -0.1 -2.5
37 1.2 5 0.002 0.002 0.002 -
V+ 45 55 2 2 7 7 0.1 2.5 0.1 2.5 0.1 2.5
V nA nA nA nA nA nA
RON Matching Between Channels, RON RON Flatness, RFLAT(ON)
V+ = 10.8V, ICOM = 1.0mA, VNO = 9V (Note 6)
25 Full
V+ = 10.8V, ICOM = 1.0mA, VNO = 3V, 6V, 9V (Note 7)
25 Full
NO OFF Leakage Current, INO(OFF)
V+ = 13.2V, VCOM = 1V, 12V, VNO = 12V, 1V (Note 8)
25 Full
COM OFF Leakage Current, ICOM(OFF)
V+ = 13.2V, VCOM = 12V, 1V, VNO = 1V, 12V (Note 8)
25 Full 25 Full
COM ON Leakage Current, ICOM(ON) V+ = 13.2V, VCOM = 1V, 12V, VNO = 1V, 12V, or floating (Note 8) DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINHH, VADDH Input Voltage Low, VINHL, VADDL Input Current, IADDH, IADDL, IINHH, IINHL V+ = 13.2V, VINH, VADD = 0V or V+
Full Full Full
3.7 -0.5
3.3 2.7 -
0.8 0.5
V V A
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FN6416.0 February 9, 2007
ISL84581
Electrical Specifications +12V Supply
Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 4), Unless Otherwise Specified (Continued) TEST CONDITIONS TEMP (C) (NOTE 5) MIN TYP (NOTE 5) MAX UNITS
PARAMETER DYNAMIC CHARACTERISTICS INHIBIT Turn-ON Time, tON
V+ = 10.8V, VNO = 10V, RL = 300, CL = 35pF, VIN = 0 to 4 (See Figure 1) V+ = 10.8V, VNO = 10V, RL = 300, CL = 35pF, VIN = 0 to 4 (See Figure 1) V+ = 10.8V, VNO = 10V, RL = 300, CL = 35pF, VIN = 0 to 4 (See Figure 1) V+ = 13.2V, RL = 300, CL = 35pF, VNO = 10V, VIN = 0 to 4 (See Figure 3) CL = 1.0nF, VG = 0V, RG = 0 (See Figure 2) RL = 50, CL = 15pF, f = 100kHz (See Figure 4 and 18) f = 1MHz, VNO = VCOM = 0V (See Figure 6) f = 1MHz, VNO = VCOM = 0V (See Figure 6) f = 1MHz, VNO = VCOM = 0V (See Figure 6)
25 Full 25 Full 25 Full Full 25 25 25 25 25
2 -
24 15 27 5 2.7 92 3 21 26
40 45 30 35 50 55 5 -
ns ns ns ns ns ns ns pC dB pF pF pF
INHIBIT Turn-OFF Time, tOFF
Address Transition Time, tTRANS
Break-Before-Make Time Delay, tD Charge Injection, Q OFF Isolation NO OFF Capacitance, COFF COM OFF Capacitance, CCOM(OFF) COM ON Capacitance, CCOM(ON)
POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ V+ = 13.2V, VINH, VADD = 0V or V+, all channels on or off Full Full 2 -7 12 7 V A
Electrical Specifications 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified TEST CONDITIONS TEMP (C) (NOTE 5) MIN TYP (NOTE 5) MAX UNITS
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON
Full V+ = 4.5V, ICOM = 1.0mA, VNO = 3.5V (See Figure 5) V+ = 4.5V, ICOM = 1.0mA, VNO = 3V (Note 6) 25 Full 25 Full V+ = 4.5V, ICOM = 1.0mA, VNO = 1V, 2V, 3V (Note 7) V+ = 5.5V, VCOM = 1V, 4.5V, VNO = 4.5V, 1V (Note 8) Full 25 Full 25 Full 25 Full
0 -0.1 -2.5 -0.1 -2.5 -0.1 -2.5
81 2.2 11.5 0.002 0.002 0.002 -
V+ 100 120 4 6 0.1 2.5 0.1 2.5 0.1 2.5
V nA nA nA nA nA nA
RON Matching Between Channels, RON RON Flatness, RFLAT(ON) NO OFF Leakage Current, INO(OFF)
COM OFF Leakage Current, ICOM(OFF) V+ = 5.5V, VCOM = 1V, 4.5V, VNO = 4.5V, 1V (Note 8) COM ON Leakage Current, ICOM(ON) V+ = 5.5V, VCOM = VNO = 4.5V (Note 8)
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINHH, VADDH Full 2.4 V
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FN6416.0 February 9, 2007
ISL84581
Electrical Specifications 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified (Continued) TEST CONDITIONS TEMP (C) Full V+ = 5.5V, VINH, VADD = 0V or V+ Full (NOTE 5) MIN -0.5 TYP (NOTE 5) MAX UNITS 0.8 0.5 V A
PARAMETER Input Voltage Low, VINHL, VADDL Input Current, IADDH, IADDL, IINHH, IINHL DYNAMIC CHARACTERISTICS INHIBIT Turn-ON Time, tON
V+ = 4.5V, VNO = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V (See Figure 1) V+ = 4.5V, VNO = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V (See Figure 1) V+ = 4.5V, VNO = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V (See Figure 1) V+ = 5.5V, VNO = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V (See Figure 3) CL = 1.0nF, VG = 0V, RG = 0 (See Figure 2) RL = 50, CL = 15pF, f = 100kHz, VNOx = 1VRMS (See Figures 4 and 18)
25 Full 25 Full 25 Full Full 25 25
2 -
43 20 51 9 0.6 92
60 70 35 40 70 85 1.5 -
ns ns ns ns ns ns ns pC dB
INHIBIT Turn-OFF Time, tOFF
Address Transition Time, tTRANS
Break-Before-Make Time, tBBM Charge Injection, Q OFF Isolation POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ Positive Supply Current, I-
Full V+ = 5.5V, V- = 0V, VINH, VADD = 0V or V+, Switch On or Off Full Full
2 -7 -1
-
12 7 1
V A A
Electrical Specifications 3.3V Supply
Test Conditions: V+ = +3.0V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified TEST CONDITIONS TEMP (C) (NOTE 5) MIN TYP (NOTE 5) MAX UNITS
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON
Full V+ = 3.0V, ICOM = 1.0mA, VNO = 1.5V (See Figure 5) V+ = 3.0V, ICOM = 1.0mA, VNO = 1.5V (Note 6) 25 Full 25 Full V+ = 3.0V, ICOM = 1.0mA, VNO = 0.5V, 1V, 2V (Note 7) V+ = 3.6V, VCOM = 0V, 4.5V, VNO = 3V, 1V (Note 8) V+ = 3.6V, VCOM = 0V, 4.5V, VNO = 3V, 1V (Note 8) V+ = 3.6V, VCOM = VNO = 3V (Note 8) Full 25 Full 25 Full 25 Full
0 -0.1 -2.5 -0.1 -2.5 -0.1 -2.5
135 3.4 34 0.002 0.002 0.002 -
V+ 180 200 8 10 0.1 2.5 0.1 2.5 0.1 2.5
V nA nA nA nA nA nA
RON Matching Between Channels, RON RON Flatness, RFLAT(ON) NO OFF Leakage Current, INO(OFF)
COM OFF Leakage Current, ICOM(OFF) COM ON Leakage Current, ICOM(ON)
DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINHH, VADDH Input Voltage Low, VINHL, VADDL Full Full 2.4 0.8 V V
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FN6416.0 February 9, 2007
ISL84581
Electrical Specifications 3.3V Supply
Test Conditions: V+ = +3.0V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified (Continued) TEST CONDITIONS V+ = 3.6V, VINH, VADD = 0V or V+ TEMP (C) Full (NOTE 5) MIN -0.5 TYP (NOTE 5) MAX UNITS 0.5 A
PARAMETER Input Current, IADDH, IADDL, IINHH, IINHL DYNAMIC CHARACTERISTICS INHIBIT Turn-ON Time, tON
V+ = 3.0V, VNO = 1.5V, RL = 300, CL = 35pF, VIN = 0 to 3V (See Figure 1) V+ = 3.0V, VNO = 1.5V, RL = 300, CL = 35pF, VIN = 0 to 3V (See Figure 1) V+ = 3.0V, VNO = 1.5V, RL = 300, CL = 35pF, VIN = 0 to 3V (See Figure 1) V+ = 3.6V, VNO = 1.5V, RL = 300, CL = 35pF, VIN = 0 to 3V (See Figure 3) CL = 1.0nF, VG = 0V, RG = 0 (See Figure 2) RL = 50, CL = 15pF, f = 100kHz, VNO = 1VRMS (See Figures 4 and 18)
25 Full 25 Full 25 Full Full 25 25
3 -
82 37 96 13 0.3 92
100 120 50 60 120 145 1 -
ns ns ns ns ns ns ns pC dB
INHIBIT Turn-OFF Time, tOFF
Address Transition Time, tTRANS
Break-Before-Make Time, tBBM Charge Injection, Q OFF Isolation
POWER SUPPLY CHARACTERISTICS Power Supply Range NOTES: 4. VIN = Input logic voltage to configure the device in a given state. 5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 6. RON = RON (MAX) - RON (MIN). 7. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range. 8. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at +25C. 9. Between any two switches. Full 2 12 V
Test Circuits and Waveforms
V+ 3V LOGIC INPUT 50% 0V tON V+ NO0 NO1-NO7 INH 90% LOGIC INPUT COM VOUT tr < 20ns tf < 20ns C C VC
VNO0 SWITCH OUTPUT 0V tOFF
90%
VOUT
GND ADDA-C
RL 300
CL 35pF
Logic input waveform is inverted for switches that have the opposite logic sense.
Repeat test for other switches. CL includes fixture and stray capacitance. RL -----------------------------V OUT = V (NO or NC) R + R L ( ON ) FIGURE 1B. INHIBIT tON/tOFF TEST CIRCUIT
FIGURE 1A. INHIBIT tON/tOFF MEASUREMENT POINTS
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FN6416.0 February 9, 2007
ISL84581 Test Circuits and Waveforms
3V LOGIC INPUT 50% 0V tTRANS VC VNO0 SWITCH OUTPUT VOUT 90% LOGIC INPUT 10% V+ NO0 NO7 NO1-NO6 ADDA-C GND COM INH VOUT
(Continued)
tr < 20ns tf < 20ns C V+ C VC
0V
RL 300
CL 35pF
VNOX tTRANS
Logic input waveform is inverted for switches that have the opposite logic sense.
Repeat test for other switches. CL includes fixture and stray capacitance. RL V OUT = V (NO or NC) -----------------------------R L + R ( ON ) FIGURE 1D. ADDRESS tTRANS TEST CIRCUIT
FIGURE 1C. ADDRESS tTRANS MEASUREMENT POINTS
FIGURE 1. SWITCHING TIMES
V+ 3V LOGIC INPUT OFF ON OFF 0V RG NO SWITCH OUTPUT VOUT Q = VOUT x CL VOUT VG 0 ADDX GND INH LOGIC INPUT CL 1nF VOUT COM C VC
Repeat test for other switches. FIGURE 2A. Q MEASUREMENT POINTS FIGURE 2. CHARGE INJECTION
V+ 3V LOGIC INPUT 0V V+ SWITCH OUTPUT VOUT 0V tBBM 80% LOGIC INPUT NO0-NO7 ADDA-C tr < 20ns tf < 20ns C VC
FIGURE 2B. Q TEST CIRCUIT
C COM VOUT RL 300 CL 35pF
GND
INH
FIGURE 3A. tBBM MEASUREMENT POINTS
Repeat test for other switches. CL includes fixture and stray capacitance. FIGURE 3B. tBBM TEST CIRCUIT
FIGURE 3. BREAK-BEFORE-MAKE TIME
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FN6416.0 February 9, 2007
ISL84581 Test Circuits and Waveforms
V+ C
(Continued)
VC V+ C VC
SIGNAL GENERATOR
NOx
RON = V1/1mA NO VNOX 0V or V+ ADDX 0V or V+ GND INH 1mA V1 0V or V+ ADDX
ANALYZER RL
COM
COM
GND
INH
FIGURE 4. OFF ISOLATION TEST CIRCUIT
FIGURE 5. RON TEST CIRCUIT
V+
C
V-
C
NOx 0V or V+ IMPEDANCE ANALYZER COM ADDX
GND
INH
FIGURE 6. CAPACITANCE TEST CIRCUIT
Detailed Description
The ISL84581 multiplexer offers precise switching capability from bipolar 2V to 6Vsupplies or a single 2V to 12V supply. When powered with dual 5V supplies the part has low onresistance (39) and high speed operation (tON = 38ns, tOFF = 19ns). It has an inhibit pin to simultaneously open all signal paths. The device is especially well suited for applications using 5V supplies. With 5V supplies the performance (RON, Leakage, Charge Injection, etc.) is best in class. High frequency applications also benefit from the wide bandwidth and high off isolation.
ESD protection diodes from the pin to V+ and to V- (see Figure 7). To prevent forward biasing these diodes, V+ and V- must be applied before any input signals, and input signal voltages must remain between V+ and V-. If these conditions cannot be guaranteed, then one of the following two protection methods should be employed. Logic inputs can easily be protected by adding a 1k resistor in series with the input (see Figure 7). The resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. This method is not applicable for the signal path inputs. Adding a series resistor to the switch input defeats the purpose of using a low RON switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see Figure 7). These additional diodes limit the analog signal from 1V below V+ to
FN6416.0 February 9, 2007
Supply Sequencing And Overvoltage Protection
With any CMOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the IC. All I/O pins contain
9
ISL84581
1V above V-. The low leakage current performance is unaffected by this approach, but the switch resistance may increase, especially at low supply voltages.
OPTIONAL PROTECTION RESISTOR FOR LOGIC INPUTS
High-Frequency Performance
In 50 systems, signal response is reasonably flat even past 100MHz (see Figures 16 and 17). Figures 16 and 17 also illustrates that the frequency response is very consistent over varying analog signal levels. An OFF switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feed through from a switch's input to its output. Off Isolation is the resistance to this feed through. Figure 18 details the high Off Isolation of the ISL84581. At 10MHz, Off Isolation is about 55dB in 50 systems, decreasing approximately 20dB per decade as frequency increases. Higher load impedances decrease Off Isolation due to the voltage divider action of the switch OFF impedance and the load impedance.
OPTIONAL PROTECTION DIODE V+ LOGIC VNOx VCOM
1k
VOPTIONAL PROTECTION DIODE
Leakage Considerations
Reverse ESD protection diodes are internally connected between each analog-signal pin and both V+ and V-. One of these diodes conducts if any analog signal exceeds V+ or V-. Virtually all the analog leakage current comes from the ESD diodes to V+ or V-. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either V+ or V- and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the V+ and V- pins constitutes the analog-signalpath leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity. There is no connection between the analog signal paths and GND.
FIGURE 7. INPUT OVERVOLTAGE PROTECTION
Power-Supply Considerations
The ISL84581 construction is typical of most CMOS analog switches, in that it has three supply pins: V+, V-, and GND. V+ and V- drive the internal CMOS switches and set their analog voltage limits, so there are no connections between the analog signal path and GND. Unlike switches with a 13V maximum supply voltage, the ISL84581 15V maximum supply voltage provides plenty of room for the 10% tolerance of 12V supplies (6V or 12V single supply), as well as room for overshoot and noise spikes. The part performs equally well when operated with bipolar or single voltage supplies.The minimum recommended supply voltage is 2V single supply or 2V dual supply. It is important to note that the input signal range, switching times, and onresistance degrade at lower supply voltages. Refer to the electrical specification tables and "Typical Performance Curves" on page 11 for details. V+ and GND power the internal logic setting the digital switching point of the level shifters. The level shifters convert the logic levels to switched V+ and V- signals to drive the analog switch gate terminals.
Logic-Level Thresholds
V+ and GND power the internal logic stages, so V- has no affect on logic thresholds. This ISL84581 is TTL compatible (0.8V and 2.4V) over a V+ supply range of 2.7V to 10V. At 12V the VIH level is about 3.3V. This is still below the CMOS guaranteed high output minimum level of 4V, but noise margin is reduced. For best results with a 12V supply, use a logic family that provides a VOH greater than 4V. The digital input stages draw supply current whenever the digital input voltage is not at one of the supply rails. Driving the digital input signals from GND to V+ with a fast transition time minimizes power dissipation.
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FN6416.0 February 9, 2007
ISL84581
Typical Performance Curves TA = +25C, Unless Otherwise Specified
70 60 50 40 30 RON () 20 400 V- = 0V 300 200 100 -40C 0 2 3 4 5 6 7 V+ (V) 8 9 10 11 12 V- = -5V VCOM = (V+) - 1V ICOM = 1mA +85C +25C -40C RON () 120 110 100 90 80 70 60 50 90 80 70 60 50 40 30 60 50 40 30 20 -5 -4 -3 -2 -1 1 0 VCOM (V) 2 3 4 5 -40C ICOM = 1mA +85C +25C -40C VS = 3V +85C +25C -40C VS = 5V VS = 2V
+85C +25C
+25C
+85C
FIGURE 8. ON RESISTANCE vs SUPPLY VOLTAGE
FIGURE 9. ON RESISTANCE vs SWITCH VOLTAGE
225 200 175 150 125 100 75 160 140 120 100 80 60 100 90 80 70 60 50 40 0 +85C +25C -40C
ICOM = 1mA
60 V+ = 12V 55 50 45 RON () +85C 40 35 30 +25C V- = 0V ICOM = 1mA
V+ = 2.7V V- = 0V
RON ()
+85C +25C -40C +85C +25C -40C 1 2 VCOM (V) 3 4 5 V+ = 5V V- = 0V V+ = 3.3V V- = 0V
25 -40C 20 0 2 4 6 VCOM (V) 8 10 12
FIGURE 10. ON RESISTANCE vs SWITCH VOLTAGE
FIGURE 11. ON RESISTANCE vs SWITCH VOLTAGE
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FN6416.0 February 9, 2007
ISL84581 Typical Performance Curves TA = +25C, Unless Otherwise Specified (Continued)
500 400 300 200 100 tON (ns) 0 250 200 150 100 50 0 2 3 4 5 6 7 V+ (V) 8 9 10 11 12 -40C +85C +25C -40C V- = 0V -40C +25C +25C +85C tOFF (ns) 200 V- = -5V VCOM = (V+) - 1V -40C 150 100 50 0 100 80 60 40 20 0 2 -40C 3 4 5 6 7 V+ (V) 8 9 10 11 12 -40C V- = 0V 85C +85C +25C 25C +25C +25C 25C +85C 85C V- = -5V VCOM = (V+) - 1V
FIGURE 12. INHIBIT TURN - ON TIME vs SUPPLY VOLTAGE
FIGURE 13. INHIBIT TURN - OFF TIME vs SUPPLY VOLTAGE
300
VCOM = (V+) - 1V V- = 0V
250
VCOM = (V+) - 1V
250
200
tRANS (ns)
tRANS (ns)
200
150
150
100
+25C +85C
100
+25C +85C 50 -40C 0 2 3 4 5 6 7 8 9 10 11 12 13 2 3 4
50 -40C 0 V+ (V)
5
6
V (V)
FIGURE 14. ADDRESS TRANS TIME vs SINGLE SUPPLY VOLTAGE
FIGURE 15. ADDRESS TRANS TIME vs DUAL SUPPLY VOLTAGE
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ISL84581 Typical Performance Curves TA = +25C, Unless Otherwise Specified (Continued)
NORMALIZED GAIN (dB) VS = 5V 3 GAIN 0 -3 NORMALIZED GAIN (dB) VIN = 0.2VP-P to 5VP-P VS = 3V 3 GAIN 0 -3 VIN = 0.2VP-P to 4VP-P
PHASE
0 45 PHASE () 90 135 180
PHASE
0 45 PHASE () 90 135 180
RL = 50 1 10 100 FREQUENCY (MHz) 600 1
RL = 50 10 100 FREQUENCY (MHz) 600
FIGURE 16. FREQUENCY RESPONSE
FIGURE 17. FREQUENCY RESPONSE
-10 V+ = 3V to 12V or -20 VS = 2V to 5V RL = 50 -30 OFF ISOLATION (dB) -40 -50 Q (pC) -60 ISOLATION -70 -80 -90 -100 -110 1k
3
2 V+ = 3.3V V- = 0V V+ = 12V V- = 0V V+ = 5V V- = 0V VS = 5V -2
1
0
-1
-3
-4 10k 100k 1M 10M 100M 500M -5 -2.5 0 2.5 VCOM (V) 5 7.5 10 12 FREQUENCY (Hz)
FIGURE 18. OFF ISOLATION
FIGURE 19. CHARGE INJECTION vs SWITCH VOLTAGE
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP): VTRANSISTOR COUNT: 193 PROCESS: Si Gate CMOS
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FN6416.0 February 9, 2007
ISL84581 Thin Shrink Small Outline Plastic Packages (TSSOP)
N INDEX AREA E E1 -B1 2 3 0.05(0.002) -AD -CSEATING PLANE A 0.25 0.010 L 0.25(0.010) M GAUGE PLANE BM
M16.173
16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 b c D E1
A2 c 0.10(0.004) C AM BS
MILLIMETERS MIN 0.05 0.85 0.19 0.09 4.90 4.30 6.25 0.50 16 8o 0o 8o MAX 1.10 0.15 0.95 0.30 0.20 5.10 4.50 6.50 0.70 NOTES 9 3 4 6 7 Rev. 1 2/02
MIN 0.002 0.033 0.0075 0.0035 0.193 0.169 0.246 0.020 16 0o
MAX 0.043 0.006 0.037 0.012 0.008 0.201 0.177 0.256 0.028
e
b 0.10(0.004) M
A1
e E L N
0.026 BSC
0.65 BSC
NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-153-AB, Issue E. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E1" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "b" does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of "b" dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. (Angles in degrees)
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 14
FN6416.0 February 9, 2007


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